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W7CF016G1XA-H41DE-04D.A6 View Datasheet(PDF) - Unspecified

Part Name
Description
Manufacturer
W7CF016G1XA-H41DE-04D.A6
ETC
Unspecified ETC
W7CF016G1XA-H41DE-04D.A6 Datasheet PDF : 50 Pages
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INDUSTRIAL GRADE CompactFlashTM Card
W7CFxxxA-H4 Series RoHS 6/6 Compliant
256MB – 32GB
Table 6: Card Pin Explanation Cont.
Signal Name
Type
Pin #
-IOWR
(PC Card Memory Mode)
- IOWR
(PC Card I/O Mode)
I
35
- IOWR
(True IDE Mode)
-OE
(PC Card Memory Mode)
-OE
(PC Card I/O Mode)
I
9
-ATA SEL
(True IDE Mode)
RDY/-BSY
(PC Card Memory Mode)
O
37
- IREQ
(PC Card I/O Mode)
-INTRQ
(True IDE Mode)
Description
This signal is not used in this mode.
The I/O Write strobe pulse is used to clock I/O data on the
Card Data bus into the Compact Flash controller registers
when the card is configured to use the I/O interface.
The clocking will occur on the negative to positive edge of
the signal (trailing edge).
In True IDE Mode, this signal has the same function as in PC
Card I/O Mode.
This is an Output Enable strobe generated by the host
interface. It is used to read data from the Compact Flash Card
in Memory Mode and to read the CIS and configuration
registers.
In PC Card I/O Mode, this signal is used to read the CIS and
configuration registers.
To enable True IDE Mode this input should be grounded by
the host.
In Memory Mode this signal is set high when the Compact
Flash Card is ready to accept a new data transfer operation
and held low when the card is busy. The host memory card
socket must provide a pull-up resistor.
At power up and at Reset, the RDY/-BSY signal is held low
(busy) until the Compact Flash Card has completed its power
up or reset function. The RDY/-BSY signal is held high
(disabled from being busy) whenever the following condition
is true: The Compact Flash Card has been powered up with
+RESET continuously disconnected or asserted.
I/O Operation – After the Compact Flash Card has been
configured for I/O operation, this signal is used as – Interrupt
Request. This line is strobed low to generate a pulse mode
interrupt or held low for a level mode interrupt.
In True IDE Mode, this signal is the active high Interrupt
Request to the host.
Wintec W7CFxxx-H4 and W8CFxxx-H4 Series Datasheet v1 08.doc
August 2013 Wintec Industries, Inc.
12

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