AT42QT1110-MZ(2010) View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT42QT1110-MZ Datasheet PDF : 48 Pages
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Figure 4-5. Positive Recalibration Delay Set Instruction – CRC Disabled
Host (Sends on MOSI)
Device (Responds on MISO)
Command: 0x95
Response: 0x55 (“Idle” – Fresh Command)
Simultaneous
Transmission
“Set” Data: 0x0C
Response: 0x95 (Command Just Received)
With CRC Enabled, a CRC byte is also required (Figure 4-6). This is calculated for the two
transmitted bytes (that is, the “Set” command and the data byte).
For example, for the sequence shown in Figure 4-5 (0x95 — 0x0C), the CRC Byte is 0x9F. As is
the case with the other command types, when the QT1110 is expecting a CRC byte from the
host, it calculates that byte in advance and returns the expected value to the host in the same
transmission as the host sends the CRC byte.
The sent data is not applied to the memory location until the CRC byte has been received and
verified.
Figure 4-6. Positive Recalibration Delay Set Instruction – CRC Enabled
Host (Sends on MOSI)
Device (Responds on MISO)
Command: 0x95
Response: 0x55 (“Idle” – Fresh Command)
Simultaneous
Transmission
“Set” Data: 0x0C
Response: 0x95 (Command Just Received)
Command CRC: 0x9F
Response: 0x9F (Expected CRC)
14 AT42QT1110-MZ/AT42QT1110-AZ
9570I–AT42–03/10
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