AT89C5131A-M(2005) View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT89C5131A-M Datasheet PDF : 184 Pages
| |||
AT89C5130A/31A-M
The other memory spaces (user, extra row, hardware security) are made accessible in
the code segment by programming bits FMOD0 and FMOD1 in FCON register in accor-
dance with Table 36. A MOVC instruction is then used for reading these spaces.
Launching Programming
Table 36. FM0 Blocks Select Bits
FMOD1
0
FMOD0
0
0
1
1
0
1
1
FM0 Adressable Space
User (0000h-FFFFh)
Extra Row(FF80h-FFFFh)
Hardware Security (0000h)
reserved
FPL3:0 bits in FCON register are used to secure the launch of programming. A specific
sequence must be written in these bits to unlock the write protection and to launch the
programming. This sequence is 5 followed by A. Table 37 summarizes the memory
spaces to program according to FMOD1:0 bits.
Status of the Flash Memory
Selecting FM0/FM1
Table 37. Programming Spaces
Write to FCON
FPL3:0
FPS
FMOD1
FMOD0 Operation
5
X
0
0
No action
User
A
X
0
0
Write the column latches in user
space
5
X
0
1
No action
Extra Row
A
X
0
1
Write the column latches in extra row
space
Security
5
X
1
0
No action
Space
A
X
1
0
Write the fuse bits space
5
X
1
1
No action
Reserved
A
X
1
1
No action
The Flash memory enters a busy state as soon as programming is launched. In this
state, the memory is not available for fetching code. Thus to avoid any erratic execution
during programming, the CPU enters Idle mode. Exit is automatically performed at the
end of programming.
Note: Interrupts that may occur during programming time must be disabled to avoid any spuri-
ous exit of the idle mode.
The bit FBUSY in FCON register is used to indicate the status of programming.
FBUSY is set when programming is in progress.
The bit ENBOOT in AUXR1 register is used to choose between FM0 and FM1 mapped
up to F800h.
31
4337C–USB–02/05
Share Link: 