AT89C5131A-M(2005) View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT89C5131A-M Datasheet PDF : 184 Pages
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AT89C5130A/31A-M
Table 43. Program Lock Bits of the SSB
Program Lock Bits
Security
Level
LB0 LB1 Protection Description
1
U
U No program lock features enabled.
2
P
U ISP programming of the Flash is disabled.
3
X
P Same as 2, also verify through ISP programming interface is disabled.
Notes:
1. U: unprogrammed or "one" level.
2. P: programmed or “zero” level.
3. X: don’t care
4. WARNING: Security level 2 and 3 should only be programmed after Flash and code
verification.
Flash Memory Status
AT89C5130A/31A-M parts are delivered with the ISP boot in the Flash memory. After
ISP or parallel programming, the possible contents of the Flash memory are summa-
rized in Figure 19:
Figure 19. Flash Memory Possible Contents
3FFFh AT89C5130A-M
7FFFh AT89C5131A-M
Virgin
Application
Virgin
or
Application
Application
Virgin
or
Application
Virgin
or
Application
0000h
Default
After ISP
Dedicated
ISP
After ISP
Dedicated
ISP
After parallel After parallel After parallel
programming programming programming
Memory Organization
In the AT89C5130A/31A-M, the lowest 16/32K of the 64 Kbyte program memory
address space is filled by internal Flash.
When the EA is pin high, the processor fetches instructions from internal program Flash.
Bus expansion for accessing program memory from 16/32K upward is automatic since
external instruction fetches occur automatically when the program counter exceeds
3FFFh (16K) or 7FFFh (32K). If the EA pin is tied low, all program memory fetches are
from external memory. If all storage is on chip, then byte location 3FFFh (16K) or 7FFFh
(32K) should be left vacant to prevent and undesired pre-fetch from external program
memory address 4000h (16K) or 8000h (32K).
41
4337C–USB–02/05
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