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BU9728 View Datasheet(PDF) - ROHM Semiconductor

Part Name
Description
Manufacturer
BU9728 Datasheet PDF : 24 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Display control (DISCTL)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C 0 1 P4 P3 P2 P1 P0
Set Frame frequency
Setting
80Hz
71Hz
64Hz
53Hz
P4
P3 Reset initialize condition
0
0
0
1
1
0
1
1
Set LCD drive waveform
Setting
P2
Line inversion
0
Frame inversion
1
Reset initialize condition
Set Power save mode
Setting
P1 P0 Reset initialize condition
Power save mode 1 0 0
Power save mode 2 0 1
Normal mode
10
High power mode
11
VDD-VLCD>=3.0V is required for High power mode.
Set IC Operation (ICSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C 1 1 0 1 P2 P1 P0
P2: MSB data of DDRAM address. Please refer to “ADSET” command.
Setting
Address MSB‘0’
Address MSB‘1’
P2 Reset initialize condition
0
1
Set Software Reset condition
Setting
P1
No operation
0
Software Reset
1
Switch between internal clock and external clock.
Setting
P0 Reset initialize condition
Internal clock
0
External clock input
1
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