ST7FLITEU05B3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST7FLITEU05B3 Datasheet PDF : 115 Pages
| |||
ST7LITEU05 ST7LITEU09
DATA EEPROM (Cont’d)
5.7 REGISTER DESCRIPTION
EEPROM CONTROL/STATUS REGISTER (EEC-
SR)
Read / Write
Reset Value: 0000 0000 (00h)
7
0
0
0
0
0
0
0 E2LAT E2PGM
Bits 7:2 = Reserved, forced by hardware to 0.
Bit 1 = E2LAT Latch Access Transfer
This bit is set by software. It is cleared by hard-
ware at the end of the programming cycle. It can
only be cleared by software if the E2PGM bit is
cleared.
0: Read mode
1: Write mode
Bit 0 = E2PGM Programming control and status
This bit is set by software to begin the programming
cycle. At the end of the programming cycle, this bit
is cleared by hardware.
0: Programming finished or not yet started
1: Programming cycle is in progress
Note: if the E2PGM bit is cleared during the pro-
gramming cycle, the memory data is not guaran-
teed
Table 5. DATA EEPROM Register Map and Reset Values
Address
(Hex.)
Register
Label
7
6
5
4
3
2
1
0
EECSR
0030h
Reset Value
0
0
0
0
0
E2LAT E2PGM
0
0
0
18/115
1
Share Link: 