IT8510E View Datasheet(PDF) - ITE Tech. INC.

Part Name

Description

Manufacturer

IT8510E

Embedded Controller

ITE Tech. INC. 

System Block Diagram

Host Memory Space

(byte)

4G Top

FFFF_FFFFh

RANGE 1

64k

FFFF_0000h

FFFE_FFFFh

RANGE 2

64k

FFFE_0000h

FFFD_FFFFh

(byte)

07_FFFFh

07_0000h

06_FFFFh

06_0000h

05_FFFFh

Expansion Flash Space

Flash Space Top

RANGE 1

RANGE 2

EC

Code Memory Space

RANGE 3

512k

RANGE 3

FFF9_0000h

FFF8_FFFFh

RANGE 4

64k

FFF8_0000h

FFF7_FFFFh

(byte)

01_0000h

00_FFFFh

RANGE 4

FFFFh

Bank 0 (32k)

8000h

Common Bank (32k) 7FFFh

Bank 0

Common Bank

32k

32k

00_0000h

0000h

Bank 1-3 are not valid to be selected and are not shown.

Out of Range

000F_FFFFh

RANGE 1

64k

000F_0000h

000E_FFFFh

RANGE 2

64k

000E_0000h

000D_FFFFh

Out of Range

0000_0000h

Figure 3-2. Host/Flash and EC/Flash Mapping (Flash Size = 512k, EC Code = 64k, No User-Defined, a

specific example)

The flash memory space is shared between the host side and EC side, and it is shown in Figure 3-1.

An example of 512k flash size, 64k EC code size and no user-defined is shown in Figure 3-2.

The host memory 4G byte top is always mapped into the top of flash space and the host processor fetches the

first instruction after reset at FFFF_FFF0h in the host memory, which is 16 bytes below the uppermost flash

space.

The bottom of EC code is always mapped into the bottom of flash space and EC R8032TT micro-controller

fetches the first instruction after reset at 00_0000h in the EC code memory, which is 1 byte in the lowermost

flash space.

The interface line of host memory and EC code is variable and not necessary on 32k boundary.

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IT8510E/TE/G V0.7.2

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