IT8510E View Datasheet(PDF) - ITE Tech. INC.

Part Name

Description

Manufacturer

IT8510E

Embedded Controller

ITE Tech. INC. 

3.3 EC Mapped Memory Space

System Block Diagram

EC Internal

Data M em ory Space

FFh

7 fh

In d ir e c t

00h D irect & Indirect

corresponging m ove

instruction: M O V

SFR

EC External

Data M em ory Space

FFFFh

EC

Code M em ory Space

FFFFh (byte)

F800h Scratch R O M 2KB

8000h

Reserved

1F00h

1E00h

1D00h

1C00h

1B00h

1A00h

1900h

1800h

1700h

1600h

1500h

1400h

1300h

1200h

1100h

1000h

HW S, ETW D

ECPM

KB Scan

SM Bus

W UC

DAC

ADC

PW M

P S /2

G PIO

PMC

SW UC

KBC

EC2I

IN T C

SMFI

Bank

0,1,2 or 3

Be a RAM or ROM

at one tim e

Com m on

Bank

0800h

0000h

Reserved

Scratch RAM

2KB

corresponging read/write

instruction: M O VX

corresponging read

instruction: M O VC

Figure 3-3. EC 8032 Data/Code Memory Map

There is an internal Scratch SRAM which can be located at data space or code space but cannot be located at

both spaces at the same time. Where it is located depends on Scratch SRAM Map Control bit (SSMC) in

FBCFG register. It is called Scratch RAM when being located at data space (default after reset) and called

Scratch ROM when being located at code space.

The EC code space is 64k bytes and physically occupies the maximum 160 k bytes at the bottom of the flash

space. Refer to Figure 3-1 on page 6 for the details.

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IT8510E/TE/G V0.7.2

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