DPL3520A View Datasheet(PDF) - Micronas

Part Name

Description

Manufacturer

DPL3520A

Dolby Pro Logic Processor Family

Micronas 

DPL 35xxA

Dolby Pro Logic Processor Family

1. Introduction

The DPL 35xxA processor family is designed to decode

Dolby encoded surround sound. The ICs integrate the

complete Dolby Surround Pro Logic decoding on chip

without any necessary external circuitry. This data sheet

describes the features and specifications of all members

of the IC family.

The DPL 3518A is designed as a coprocessor to one of

the TV sound processing ICs of the MSP 34xx family. It

only has digital interfaces. No analog input and output in-

terfaces are supported.

The DPL 3519A is also designed as a coprocessor to the

MSP family but has analog output channels in addition

to the features of the DPL 3518A. Together with the MSP,

a TV set with up to six outputs (L, R, C, SUB, SL, SR) can

be developed together with headphones and several

line outputs.

The DPL 3520A is designed as a stand-alone Dolby Sur-

round Pro Logic decoder. An on-chip A/D converter digi-

tizes analog inputs. The DPL 3520A can also be used as

a coprocessor to the MSP 34xx single-chip Multistan-

dard Sound Processor family. This gives another A/D in-

put pair to the system.

The ICs of the DPL family are pin-compatible to the MSP

ICs. This speeds up PCB development for customers

using MSPs.

The software interface is largely the same as for the

MSP 3400C. Volume, tone controls, matrixes and

switches use the same registers and values. Thus, the

standard MSP 3400C controlling software can be used

to control the DPL 3520A. Little overhead is needed to

control the Dolby Pro Logic part of the IC.

PRELIMINARY DATA SHEET

4

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