LC78681KE-L View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LC78681KE-L

Digital Signal Processor for Compact Disc Players

SANYO -> Panasonic 

LC78681KE, 78681KE-L

Of the eight bits in the subcode, the Q signal is used for song (track) access and display. The WRQ will be high only

if the data passed the CRC error check and the subcode Q format internal address is 1*. The control microprocessor

can read out data from SQOUT in the order shown below by detecting this high level and applying CQCK. When

CQCK is applied the DSP disables register update internally. The microprocessor should give update permission by

setting RWC high briefly after reading has completed. WRQ will fall to low at this time. Since WRQ falls to low

11.2 ms after going high, CQCK must be applied during the high period. Data can be read out in an LSB first format

if the M/L pin is set low, and in an MSB first format if that pin is set high.

Note: * That state will be ignored if an address free command is sent. This is provided to handle CDV applications.

Note: 1. Normally, the WRQ pin indicates the subcode Q standby state. However, it is used for a different monitoring purpose in track count mode and

internal brake mode. (See the item on track counting and internal braking for details.)

2. The LC78681KE becomes active when the CS pin is low, and data is output from the SQOUT pin. When the CS pin is high, the SQOUT pin

goes to the high impedance state.

12. Level meter (LVM) data and peak meter (PKM) data readout

MSB

LSB

00101011

00101100

00101101

00101110

Command

PKM SET (LVM Reset)

LVM SET (PKM Reset)

PKM MASK SET

PKM MASK RESET

RES = low

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