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MPC8541PXALF View Datasheet(PDF) - Freescale Semiconductor

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Description
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MPC8541PXALF Datasheet PDF : 88 Pages
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Electrical Characteristics
Figure 3 shows the undershoot and overshoot voltage of the PCI interface of the MPC8541E for the 3.3-V
signals, respectively.
Overvoltage
Waveform
Undervoltage
Waveform
11 ns
(Min)
+7.1 V
4 ns
(Max)
0V
4 ns
(Max)
62.5 ns
+3.6 V
–3.5 V
7.1 V p-to-p
(Min)
7.1 V p-to-p
(Min)
Figure 3. Maximum AC Waveforms on PCI interface for 3.3-V Signaling
2.1.4 Output Driver Characteristics
Table 3 provides information on the characteristics of the output driver strengths. The values are
preliminary estimates.
Table 3. Output Drive Capability
Driver Type
Programmable Output
Impedance (Ω)
Supply
Voltage
Notes
Local bus interface utilities signals
25
42 (default)
OVDD = 3.3 V
1
PCI signals
25
2
42 (default)
DDR signal
20
GVDD = 2.5 V
TSEC/10/100 signals
42
LVDD = 2.5/3.3 V
DUART, system control, I2C, JTAG
42
OVDD = 3.3 V
Notes:
1. The drive strength of the local bus interface is determined by the configuration of the appropriate bits in PORIMPSCR.
2. The drive strength of the PCI interface is determined by the setting of the PCI_GNT1 signal at reset.
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
Freescale Semiconductor
11

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