S25FL127S
12.5 Initial Delivery State
The device is shipped from Cypress with non-volatile bits set as follows:
The entire memory array is erased: i.e. all bits are set to 1 (each byte contains FFh).
The OTP address space has the first 16 bytes programmed to a random number. All other bytes are erased to FFh.
The SFDP address space contains the values as defined in the description of the SFDP address space.
The ID-CFI address space contains the values as defined in the description of the ID-CFI address space.
The Status Register 1 contains 00h (all SR1 bits are cleared to 0’s).
The Configuration Register 1 contains 00h.
The Autoboot register contains 00h.
The Password Register contains FFFFFFFF-FFFFFFFFh
All PPB bits are 1.
Document Number: 001-98282 Rev. *I
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