PIC18F65J50T-I/PT View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F65J50T-I/PT
Microchip Technology
PIC18F65J50T-I/PT Datasheet PDF : 480 Pages
| |||
PIC18F87J50 FAMILY
TABLE 1-3: PIC18F6XJ5X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin Buffer
64-TQFP Type Type
Description
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/FLT0/INT0
RB0
FLT0
INT0
48
I/O TTL
Digital I/O.
I
ST
ECCP1/2/3 Fault input.
I
ST
External interrupt 0.
RB1/INT1/PMA4
RB1
INT1
PMA4
47
I/O TTL
Digital I/O.
I
ST
External interrupt 1.
O
—
Parallel Master Port address.
RB2/INT2/PMA3
RB2
INT2
PMA3
46
I/O TTL
Digital I/O.
I
ST
External interrupt 2.
O
—
Parallel Master Port address.
RB3/INT3/PMA2
RB3
INT3
PMA2
45
I/O TTL
Digital I/O.
I
ST
External interrupt 3.
O
—
Parallel Master Port address.
RB4/KBI0/PMA1
RB4
KBI0
PMA1
44
I/O TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
—
Parallel Master Port address.
RB5/KBI1/PMA0
RB5
KBI1
PMA0
43
I/O TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
—
Parallel Master Port address.
RB6/KBI2/PGC
RB6
KBI2
PGC
42
I/O TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
ST
In-Circuit Debugger and ICSP™ programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
37
I/O TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
ST
In-Circuit Debugger and ICSP programming data pin.
Legend:
Note 1:
2:
3:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD
= Open-Drain (no P diode to VDD)
Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared.
RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
DS39775B-page 14
Preliminary
© 2007 Microchip Technology Inc.
Share Link: