PIC18F65J50T-I/PT View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F65J50T-I/PT
Microchip Technology
PIC18F65J50T-I/PT Datasheet PDF : 480 Pages
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PIC18F87J50 FAMILY
TABLE 1-3: PIC18F6XJ5X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin Buffer
64-TQFP Type Type
Description
PORTD is a bidirectional I/O port.
RD0/PMD0
RD0
PMD0
58
I/O
ST
Digital I/O.
I/O TTL
Parallel Master Port data.
RD1/PMD1
RD1
PMD1
55
I/O
ST
Digital I/O.
I/O TTL
Parallel Master Port data.
RD2/PMD2
RD2
PMD2
54
I/O
ST
Digital I/O.
I/O TTL
Parallel Master Port data.
RD3/PMD3
RD3
PMD3
53
I/O
ST
Digital I/O.
I/O TTL
Parallel Master Port data.
RD4/PMD4/SDO2
RD4
PMD4
SDO2
52
I/O
ST
Digital I/O.
I/O TTL
Parallel Master Port data.
O
—
SPI data out.
RD5/PMD5/SDI2/SDA2
51
RD5
PMD5
SDI2
SDA2
I/O
ST
I/O TTL
I
ST
I/O
ST
Digital I/O.
Parallel Master Port data.
SPI data in.
I2C™ data I/O.
RD6/PMD6/SCK2/SCL2
50
RD6
PMD6
SCK2
SCL2
I/O
ST
I/O TTL
I/O
ST
I/O
ST
Digital I/O.
Parallel Master Port data.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I2C mode.
RD7/PMD7/SS2
RD7
PMD7
SS2
49
I/O
ST
Digital I/O.
I/O TTL
Parallel Master Port data.
I
TTL
SPI slave select input.
Legend:
Note 1:
2:
3:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD
= Open-Drain (no P diode to VDD)
Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared.
RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
DS39775B-page 16
Preliminary
© 2007 Microchip Technology Inc.
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