ST72324J2-AUTO View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72324J2-AUTO

8-bit MCU for automotive, 3.8 to 5.5V operating range with 8 to 32 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI

STMicroelectronics 

Register and memory map

ST72324xx-Auto

Table 3. Hardware register map (continued)

Address Block Register label

Register name

Reset status Remarks

0041h

TBCR2

Timer B control register 2

00h

R/W

0042h

TBCR1

Timer B control register 1

00h

R/W

0043h

TBCSR

Timer B control/status register

xxxx x0xxb R/W

0044h

TBIC1HR

Timer B input capture 1 high register

xxh

Read only

0045h

TBIC1LR

Timer B input capture 1 low register

xxh

Read only

0046h

TBOC1HR

Timer B output compare 1 high register

80h

R/W

0047h

TBOC1LR

Timer B output compare 1 low register

00h

R/W

0048h Timer B TBCHR

Timer B counter high register

FFh

Read only

0049h

TBCLR

Timer B counter low register

FCh

Read only

004Ah

TBACHR

Timer B alternate counter high register

FFh

Read only

004Bh

004Ch

t(s) 004Dh

004Eh

c 004Fh

TBACLR

TBIC2HR

TBIC2LR

TBOC2HR

TBOC2LR

Timer B alternate counter low register

Timer B input capture 2 high register

Timer B input capture 2 low register

Timer B output compare 2 high register

Timer B output compare 2 low register

FCh

Read only

xxh

Read only

xxh

Read only

80h

R/W

00h

R/W

du 0050h

ro 0051h

0052h

P 0053h

te 0054h

le 0055h

0056h

so 0057h

SCISR

SCIDR

SCIBRR

SCI

SCICR1

SCICR2

SCIERPR

SCIETPR

SCI status register

SCI data register

SCI baud rate register

SCI control register 1

SCI control register 2

SCI extended receive prescaler register

Reserved area

SCI extended transmit prescaler register

C0h

xxh

00h

x000 0000b

00h

00h

---

00h

Read only

R/W

R/W

R/W

R/W

R/W

R/W

b 0058h to

O 006Fh

Reserved area (24 bytes)

) - 0070h

t(s 0071h

0072h

ADC

ADCCSR

ADCDRH

ADCDRL

Control/status register

Data high register

Data low register

00h

R/W

00h

Read only

00h

Read only

uc 0073h

d 007Fh

Reserved area (13 bytes)

ro 1. The bits associated with unavailable pins must always keep their reset value.

P 2. The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values of the

te I/O pins are returned instead of the DR register contents.

le 3. The Timer A Input Capture 2 pin is not available (not bonded). The TAIC2HR and TAIC2LR registers are not present. Bit 5

of the TACSR register (ICF2) is forced by hardware to 0. Consequently, the corresponding interrupt cannot be used.

so 4. The Timer A Output Compare 2 pin is not available (not bonded). The TAOC2HR and TAOC2LR Registers are write only,

reading them will return undefined values. Bit 4 of the TACSR register (OCF2) is forced by hardware to 0. Consequently,

Obthe corresponding interrupt cannot be used.

Caution:

Legend: x = undefined, R/W = read/write

The TAIC2HR and TAIC2LR registers and the ICF2 and OCF2 flags are not present in Flash

devices but are present in the emulator. For compatibility with the emulator, it is

recommended to perform a dummy access (read or write) to the TAIC2LR and TAOC2LR

registers to clear the interrupt flags.

22/193

Doc ID 13841 Rev 1

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