KAD2710L View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

KAD2710L

10-Bit, 275MSPS Analog-to-Digital Converter

Unspecified 

KAD2710L 10-Bit, 275MSPS Analog-to-Digital Converter

Equivalent Circuits

Layout Considerations

Figure 23. Analog Inputs

Split Ground and Power Planes

Data converters operating at high sampling frequen-

cies require extra care in PC board layout. Many

complex board designs benefit from isolating the

analog and digital sections. Analog supply and

ground planes should be laid out under signal and

clock inputs. Locate the digital planes under outputs

and logic pins. Grounds should be joined under the

chip.

Clock Input Considerations

Use matched transmission lines to the inputs for the

analog input and clock signals. Locate transformers,

drivers and terminations as close to the chip as possi-

ble.

Bypass and Filtering

Bulk capacitors should have low equivalent series re-

sistance. Tantalum is a good choice. For best per-

formance, keep ceramic bypass capacitors very

close to device pins. Longer traces will increase in-

ductance, resulting in diminished dynamic perform-

ance and accuracy. Make sure that connections to

ground are direct and low impedance. Avoid form-

ing ground loops.

Figure 24. Clock Inputs

OVDD

2mA or

3mA

DATA

DATA

OVDD

OVDD

D[9:0]P

DATA

2mA or

3mA

DATA

D[9:0]N

LVDS Outputs

Output traces and connections must be designed for

50Ω (100Ω differential) characteristic impedance.

Keep traces direct, and minimize bends where possi-

ble. Avoid crossing ground and power plane breaks

with signal traces.

Unused Inputs

Three of the four standard logic inputs (RESET, CLKDIV,

2SC) which will not be operated do not require con-

nection for best ADC performance. These inputs can

be left open if they are not used. VREFSEL must be

held low for internal reference, but can be left open

for external reference.

Figure 25. LVDS Outputs

Rev 1.1

Page 14 of 17

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