M2V56S20AKT-5 View Datasheet(PDF) - MITSUBISHI ELECTRIC
Part Name
Description
Manufacturer
M2V56S20AKT-5 Datasheet PDF : 51 Pages
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SDRAM (Rev.1.31)
Single Data Rate
Apr. '02
MITSUBISHI LSIs
M2V56S20/ 30/ 40 ATP
M2V56S20/ 30/ 40 AKT
256M Synchronous DRAM
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~ 70'C, Vdd = VddQ = 3.3+0.3V, Vss = VssQ = 0V, Output Open, unless otherwise noted)
Symbol
Parameter
Test Conditions
Organi-
zation
Limits(max)
-5 -6 -7
Unit Note
Operating Current
Icc1
(1bank)
tCLK=min, tRC=min, BL=1
Icc2P Idle Standby Current tCLK=min, CKE<VILmax
Icc2PS in Power Down Mode tCLK=L, CKE<VILmax
Icc2N Idle Standby Current
in Normal Mode
Icc2NS
tCLK=min, CKE>VIHmin,
/CS>VIHmin
tCLK=L, CKE>VIHmin
Icc3N Active Standby
Current
Icc3NS in Normal Mode
tCLK=min, CKE>VIHmin,
/CS> VIHmin
tCLK=L, CKE>VIHmin
Burst Operating
Icc4
Current
tCLK=min, BL=4, gapless
data
Icc5 Auto-Refresh Current tCLK=min, tRFC=min
x4 90 80 75
x8 95 85 80 mA 1
x16 100 90 85
1
mA
2
1
mA
12
10 mA 2,3
3
mA 2,4
20
15 mA 3,5
10
mA 4,5
x4
80
70
x8
90
80 mA 5
x16
110 100
170 150 140 mA
-5 / -6 / -7
3
Icc6 Self-Refresh Current CKE<0.2v
-5L / -6L / -7L
2
-5UL / -6UL / -7UL
1
mA
mA 6
mA 7
Notes
1. addresses are changed 3 times during tRC, only 1 bank is active & all other banks are idle
2. all banks are idle
3. input signals are changed one time during 3xtCLK
4. input signals are stable
5. all banks are active
6. Low Power Version(-5L/-6L/-7L)
7. Ultra Low Power Version(-5UL/-6UL/-7UL)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70'C, Vdd = VddQ = 3.3 + 0.3V, Vss = VssQ = 0V, unless otherwise noted)
Symbol
Parameter
Test Conditions
Limits
Unit
Min. Max.
VOH(DC) High-Level Output Voltage (DC) IOH=-2mA
2.4
V
VOL(DC) Low-Level Output Voltage (DC) IOL= 2mA
0.4 V
IOZ
Off-state Output Current
Q floating Vo=0 ~ VddQ
-10 10 uA
IL
Input Current
VIH=0 ~ VddQ+0.3V, other input pins=0V -10
10
uA
MITSUBISHI ELECTRIC
32
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