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MKL33Z128VLH4 View Datasheet(PDF) - NXP Semiconductors.

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Description
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MKL33Z128VLH4 Datasheet PDF : 65 Pages
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General
Table 9. Power consumption operating behaviors (continued)
Symbol Description
IDD_VLPR
Very-low-power run mode current—2 MHz LIRC
mode, While(1) loop in SRAM all peripheral clock
enable, 2 MHz core / 0.5 MHz flash, VDD = 3.0 V
• at 25 °C
IDD_WAIT
Wait mode current—core disabled, 48 MHz
system/24 MHz bus, flash disabled (flash doze
enabled), all peripheral clocks disabled,
MCG_Lite under HIRC mode, VDD = 3.0 V
IDD_WAIT
Wait mode current—core disabled, 24 MHz
system/12 MHz bus, flash disabled (flash doze
enabled), all peripheral clocks disabled,
MCG_Lite under HIRC mode, VDD = 3.0 V
IDD_VLPW Very-low-power wait mode current, core
disabled, 4 MHz system/ 1 MHz bus and flash,
all peripheral clocks disabled, VDD = 3.0 V
IDD_VLPW Very-low-power wait mode current, core
disabled, 2 MHz system/ 0.5 MHz bus and flash,
all peripheral clocks disabled, VDD = 3.0 V
IDD_VLPW Very-low-power wait mode current, core
disabled, 125 kHz system/ 31.25 kHz bus and
flash, all peripheral clocks disabled, VDD = 3.0 V
IDD_PSTOP2 Partial Stop 2, core and system clock disabled,
12 MHz bus and flash, VDD = 3.0 V
Min.
—
—
—
—
—
—
Typ.
208
1.81
1.22
172
69
36
Max.
289
1.89
1.39
182
76
40
Unit
μA
mA
mA
μA
μA
μA
—
IDD_PSTOP2 Partial Stop 2, core and system clock disabled,
flash doze enabled, 12 MHz bus, VDD = 3.0 V
1.81
2.06
mA
—
1.00
1.25
mA
IDD_STOP Stop mode current at 3.0 V
• at 25 °C and below
• at 50 °C
• at 85 °C
• at 105 °C
—
161.93 171.82
—
181.45 191.96
—
236.29 271.17
μA
—
390.33 465.58
IDD_VLPS Very-low-power stop mode current at 3.0 V
• at 25 °C and below
• at 50 °C
• at 85 °C
• at 105 °C
—
3.31
5.14
—
10.43
17.68
—
34.14
61.06
μA
—
104.38 164.44
IDD_VLPS Very-low-power stop mode current at 1.8 V
• at 25 °C and below
• at 50 °C
—
3.21
5.22
—
10.26
17.62
—
33.49
60.19
μA
Table continues on the next page...
Notes
12
Freescale Semiconductor, Inc.
Kinetis KL33 Microcontroller, Rev.5, 08/2015.

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