RC5042 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
RC5042 Datasheet PDF : 20 Pages
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PRODUCT SPECIFICATION
RC5042
Two MOSFETs in Parallel
We recommend that two MOSFETs be used in parallel
instead of one single MOSFET. Significant advantages are
realized using two MOSFETs in parallel:
• Significant reduction of power dissipation.
Maximum current of 14A with one MOSFET:
PMOSFET = (I2 RDS(ON))(Duty Cycle)
= (14)2(0.050*)(3.3+0.4)/(5+0.4-0.35) = 7.2 W
With two MOSFETs in parallel:
PMOSFET = (I2 RDS(ON))(Duty Cycle)
= (14/2)2(0.037*)(3.3+0.4)/(5+0.4-0.35) = 1.3W/FET
*Note: RDS(on) increases with temperature. Assume RDS(on) = 0.025 at
25°C. RDS(on) can easily increase to 0.050W at high temperature when
using a single MOSFET. When using two MOSFETs in parallel, the
temperature effects should not cause the RDS(on) to rise above the listed
maximum value of 37mW.
• Less heat sink required. With power dissipation down to
around one watt and with MOSFETs mounted flat on the
motherboard, there will be considerably less heat sink
required. The junction-to-case thermal resistance for the
MOSFET package (TO-220) is typically at 2°C/W and the
motherboard serves as an excellent heat sink.
• Higher current capability. With thermal management
under control, this on-board DC-DC converter is able to
deliver load currents up to 14.5A with no problem at all.
MOSFET Gate Bias
The MOSFET can be biased by one of two methods—
Charge Pump or 12V Gate Bias.
Charge pump (or Bootstrap) method
Figure 4 employs a charge pump to provide gate bias. Capac-
itor CP is the charge pump deployed to boost the voltage of
the RC5042 output driver. When the MOSFET switches off,
the source of the MOSFET is at -0.6V. VCCQP is charged
through the Schottky diode to 4.5V. Thus, the capacitor CP is
charged to 5V. When the MOSFET turns on, the source of
the MOSFET voltage is equal to 5V. The capacitor voltage
follows, and hence provides a voltage at VCCQP equal to
10V. The Schottky is required to provide the charge path
when the MOSFET is off. The Schottky reverses bias when
the VCCQP goes to 10V. The charge pump capacitor, CP,
needs to be a high Q and high frequency capacitor. A 1mF
ceramic capacitor is recommended here.
PWM/PFM
Control
+5V
DS2
VCCQP
HIDRV
CP
M
L1 RS
VO
DS1
CB
65-5040-13
Figure 4. Charge Pump Configuration
Method 2. 12V Gate Bias
+12V
+5V
47½
VCCQP
HIDRV
DS2
6.2V
M1
PWM/PFM
Control
L1 RS
VO
DS1
CB
65-5040-14
Figure 5. 12V Gate Bias Configuration
Figure 6 uses an external 12V source to bias VCCQP. A 47 W
resistor is used to limit the transient current into the VCCQP
pin. A 1mF capacitor filter is used to filter the VCCQP supply.
This method provides a higher gate bias voltage to the MOS-
FET, and therefore reduces the RSD(ON) and resulting power
loss within the MOSFET. Figure 7 illustrates how RDS(ON)
decreases dramatically as VGS increases. A 6.2V Zener
(DS2) is used to clamp the voltage at VCCQP to a maximum
of 12V and ensure that the absolute maximum voltage of the
IC will not be exceeded.
0.1
0.09
R(DS)Fuji
0.08
0.07
R(DS)Fuji
0.06
R(DS)706A
0.05
R(DS)-706AEL
0.04
0.03
0.02
0.01
0
1.5 2 2.5 3 3.5 4 5 6 7 8 9 10 11
VGS
Figure 6. R(DS) vs. VGS for Selected MOSFETs
11
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