P87CL881H View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

P87CL881H

Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM / LQFP44 Package

Philips Electronics 

Philips Semiconductors

Low-voltage microcontroller with 63-kbyte

OTP program memory and 2-kbyte RAM

Product specification

P87CL881H

6.4 OTP programming

6.4.1 OTP PROGRAMMING

The 63-kbyte One-Time Programmable (OTP) memory

can be programmed by using an OM4260 programmer

together with a programmer adapter OM5510. Since the

memory is programmable only once, programming an

already programmed address results in a logical AND of

the old and new code. The OTP code can be read out by

the programmer for verification.

6.4.1.1 Signature bytes

The OTP memory contains three signature bytes which

can be read by the programmer to identify the device.

A special address space has been used for these bytes

which does not influence the user address space.

The values of the signature bytes are:

(030H) = 15H, indicates manufactured by Philips

Semiconductors

(031H) = D6H, indicates P87CL881H

(060H) = 00H, currently not used.

6.4.2 IN-SYSTEM PROGRAMMING MODE

In the In-System Programming mode the OTP can be

programmed under control of the CPU. A program to

control programming has to be available in the OTP. This

mode can be used to program several bytes in the OTP if

the chip is already in a system e.g. to store tuning

parameters.

In the In-System Programming mode the complete

address space OTP can be programmed.

The user should take care not to overwrite the existing

code.

For In-System Programming four SFRs are used to control

the OTP.

Table 8 SFRs for In-System Programming

SFR NAME

OAH

OAL

ODATA

OISYS

DESCRIPTION

OTP Address High Register

OTP Address Low Register

OTP Data Register

OTP In-System Register

6.4.2.1 OTP In-System Programming Register (OISYS)

The OISYS SFR controls the In-System Programming mode. The data that has to be programmed is stored in the SFR

ODATA and the address for this data in the SFRs OAH and OAL.

Table 9 OTP In-System Programming Register (SFR address DCH)

7

6

5

4

3

2

−

−

−

VPon

0

SIG

1

0

WE

InSysMode

Table 10 Description of OISYS bits

BIT

7 to 5

4

3

2

1

0

SYMBOL

−

VPon

0

SIG

WE

InSysMode

DESCRIPTION

These bits are reserved.

VPP status (read only).

This bit is reserved and must be kept to logic 0.

Signature bytes enable.

Write Enable, enables programming.

In-System Programming status bit.

1999 Apr 16

15

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