IT8502E View Datasheet(PDF) - ITE Tech. INC.

Part Name

Description

Manufacturer

IT8502E

Embedded Controller

ITE Tech. INC. 

Contents

7.1.9.24 Timer 2 Control Register (T2CON)..................................................................... 152

7.1.9.25 Timer Mode Register (T2MOD).......................................................................... 153

7.1.9.26 Timer 2 Capture Low Byte Register (RCAP2LR) ................................................ 153

7.1.9.27 Timer 2 Capture High Byte Register (RCAP2HR)............................................... 153

7.1.9.28 Timer 2 Low Byte Register (TL2R) ..................................................................... 153

7.1.9.29 Timer 2 High Byte Register (TH2R).................................................................... 153

7.1.9.30 Program Status Word Register (PSW) ............................................................... 154

7.1.9.31 Watch Dog Timer Control Register (WDTCON).................................................. 154

7.1.9.32 Accumulator Register (ACC) .............................................................................. 154

7.1.9.33 B Register (BR) ................................................................................................. 155

7.1.9.34 Manual Prefetch Register (MPREFC)................................................................. 155

7.1.10 Programming Guide....................................................................................................... 155

7.1.10.1 IT8502 Coding Consideration ............................................................................ 155

7.1.10.2 Code Snippet of Entering Idle/Doze/Sleep Mode................................................ 156

7.1.10.3 Code snippet of Copying Flash Content to Scratch ROM 4 (MOVC-MOVX by PIO)

157

7.1.10.4 Code snippet of Copying Flash Content to Scratch ROM (DMA) ........................ 158

7.1.10.5 Code snippet of Changing PLL Frequency ......................................................... 158

7.1.10.6 Code snippet of Clearing Dynamic Caches ........................................................ 159

7.1.10.7 Code snippet of EC Base Signature................................................................... 159

7.2 Interrupt Controller (INTC).......................................................................................................... 160

7.2.1 Overview ....................................................................................................................... 160

7.2.2 Features ........................................................................................................................ 160

7.2.3 Functional Description ................................................................................................... 160

7.2.3.1 Power Fail Interrupt ........................................................................................... 160

7.2.3.2 ROM Match Interrupt ......................................................................................... 160

7.2.3.3 Programmable Interrupts ................................................................................... 160

7.2.4 EC Interface Registers ................................................................................................... 162

7.2.4.1 Interrupt Status Register 0 (ISR0) ...................................................................... 163

7.2.4.2 Interrupt Status Register 1 (ISR1) ...................................................................... 163

7.2.4.3 Interrupt Status Register 2 (ISR2) ...................................................................... 163

7.2.4.4 Interrupt Status Register 3 (ISR3) ...................................................................... 164

7.2.4.5 Interrupt Status Register 4 (ISR4) ...................................................................... 164

7.2.4.6 Interrupt Status Register 6 (ISR6) ...................................................................... 164

7.2.4.7 Interrupt Status Register 7 (ISR7) ...................................................................... 164

7.2.4.8 Interrupt Status Register 8 (ISR8) ...................................................................... 165

7.2.4.9 Interrupt Status Register 9 (ISR9) ...................................................................... 165

7.2.4.10 Interrupt Enable Register 0 (IER0) ..................................................................... 165

7.2.4.11 Interrupt Enable Register 1 (IER1) ..................................................................... 165

7.2.4.12 Interrupt Enable Register 2 (IER2) ..................................................................... 165

7.2.4.13 Interrupt Enable Register 3 (IER3) ..................................................................... 165

7.2.4.14 Interrupt Enable Register 4 (IER4) ..................................................................... 166

7.2.4.15 Interrupt Enable Register 6 (IER6) ..................................................................... 166

7.2.4.16 Interrupt Enable Register 7 (IER7) ..................................................................... 166

7.2.4.17 Interrupt Enable Register 8 (IER8) ..................................................................... 166

7.2.4.18 Interrupt Enable Register 9 (IER9) ..................................................................... 166

7.2.4.19 Interrupt Edge/Level-Triggered Mode Register 0 (IELMR0) ................................ 167

7.2.4.20 Interrupt Edge/Level-Triggered Mode Register 1 (IELMR1) ................................ 167

7.2.4.21 Interrupt Edge/Level-Triggered Mode Register 2 (IELMR2) ................................ 167

7.2.4.22 Interrupt Edge/Level-Triggered Mode Register 3 (IELMR3) ................................ 167

7.2.4.23 Interrupt Edge/Level-Triggered Mode Register 4 (IELMR4) ................................ 167

7.2.4.24 Interrupt Edge/Level-Triggered Mode Register 6 (IELMR6) ................................ 167

7.2.4.25 Interrupt Edge/Level-Triggered Mode Register 7 (IELMR7) ................................ 168

7.2.4.26 Interrupt Edge/Level-Triggered Mode Register 8 (IELMR8) ................................ 168

7.2.4.27 Interrupt Edge/Level-Triggered Mode Register 9 (IELMR9) ................................ 168

7.2.4.28 Interrupt Polarity Register 0 (IPOLR0)................................................................ 168

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IT8502E/F/G V0.7.7

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