PEB20320 View Datasheet(PDF) - Infineon Technologies

Part Name

Description

Manufacturer

PEB20320

Multichannel Network Interface Controller for HDLC

Infineon Technologies 

PEB 20320

Introduction

Pin Definitions and Functions (cont’d)

Pin No.

Symbol

P-MQFP-160-1

33

A29

Input (I) Function

Output (O)

O

Address Bit 29

(Intel non-parity/Motorola) tristate when

unused.

DP1

I/O Data Parity 1 (Intel parity mode),

bidirectional tristate line containing/

expecting parity bit of D(15:8)

28

A28

O

Address Bit 28

(Intel non-parity/Motorola) tristate when

unused

DP0

26, 21, 19, 15, A(27:2)

13, 8, 6, 2, 160,

156, 154, 149,

147, 143, 139,

135, 133, 128,

126, 122, 120,

116, 114, 109,

107, 102

91, 94, 96, 100 BE(3:0)

I/O Data Parity 0 (Intel parity mode),

bidirectional tristate line containing/

expecting parity bit of D(7:0)

O

Address Bus

tristate when unused.

O

Byte Enable (Intel bus mode)

The MUNICH32 provides word and long

word transfer. The byte enables determine

the address offset to the address

A31 … A2, the actual word has been

stored to.

Address Offset Size (Motorola mode)

Indicates the number of bytes remaining to

be transferred for this access. These

signals define the active sections of the

data bus.

In both cases these signals are tristate

when unused.

See Chapter 2.2 for details.

User’s Manual

13

01.2000

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