PEB20320 View Datasheet(PDF) - Infineon Technologies

Part Name

Description

Manufacturer

PEB20320

Multichannel Network Interface Controller for HDLC

Infineon Technologies 

PEB 20320

Introduction

Pin Definitions and Functions (cont’d)

Pin No.

Symbol

P-MQFP-160-1

38, 34, 32, 27, D(31:0)

25, 20, 18, 14,

12, 7, 5, 1, 159,

153, 148, 146,

142, 138, 134,

132, 127, 125,

121, 119, 115,

113, 108, 106,

101, 99, 95

86

DS

Input (I) Function

Output (O)

I/O Data Bus

The data bus lines are bidirectional tristate

lines which interface with the system’s

data bus.

O

Data Strobe (Motorola mode)

This signal indicates that valid data is to be

placed on the data bus (read cycle) or has

been placed on the data bus by the

MUNICH32 (write cycle).

PCHK

84, 93, 89, 98,

105, 112, 118,

124, 129, 131,

137, 140, 145,

152, 158, 4, 11,

17, 24, 31, 37,

57, 58, 63, 78

85

VDD

ADS

O

Parity Check (Intel parity mode)

This signal indicates, whether the parity

bits of a read cycle are valid (PCHK high)

or invalid (PCHK low). See Chapter 2.2.1

for details.

I

Supply voltage 5 V ± 5%

All pins must have the same level.

O

Address Status (Intel bus mode)

This signal indicates that a valid bus cycle

definition and address are being driven at

the pins.

AS

O

Address Strobe (Motorola bus mode)

A valid address is transmitted on the

address bus at the falling edge of AS.

In both cases this signal is active low and

tristate when unused.

User’s Manual

14

01.2000

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