MT48LC128M4A2A2TG-75 View Datasheet(PDF) - Micron Technology
Part Name
Description
Manufacturer
MT48LC128M4A2A2TG-75 Datasheet PDF : 55 Pages
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ADVANCE
512Mb: x4, x8, x16
SDRAM
T0
T1
T2
T3
CLK
T4
T5
COMMAND
READ
READ
READ
READ
NOP
NOP
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
CAS Latency = 2
DOUT
n
DOUT
a
DOUT
x
DOUT
m
T0
T1
T2
T3
T4
T5
T6
CLK
COMMAND
READ
READ
READ
READ
NOP
NOP
NOP
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
DOUT
n
DOUT
a
CAS Latency = 3
NOTE: Each READ command may be to any bank. DQM is LOW.
Figure 8
Random READ Accesses
DOUT
x
DOUT
m
DON’T CARE
512Mb: x4, x8, x16 SDRAM
512MSDRAM_D.p65 – Rev. D; Pub 1/02
17
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
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