MT48LC128M4A2A2TG-75 View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT48LC128M4A2A2TG-75

SYNCHRONOUS DRAM

Micron Technology 

eration that would result from the same fixed-length

burst with auto precharge. The disadvantage of the

PRECHARGE command is that it requires that the com-

mand and address buses be available at the appropriate

time to issue the command; the advantage of the

PRECHARGE command is that it can be used to truncate

fixed-length or full-page bursts.

ADVANCE

512Mb: x4, x8, x16

SDRAM

Full-page READ bursts can be truncated with the

BURST TERMINATE command, and fixed-length READ

bursts may be truncated with a BURST TERMINATE com-

mand, provided that auto precharge was not activated.

The BURST TERMINATE command should be issued x

cycles before the clock edge at which the last desired data

element is valid, where x equals the CAS latency minus

one. This is shown in Figure 12 for each possible CAS

latency; data element n + 3 is the last desired data ele-

ment of a longer burst.

T0

T1

T2

T3

T4

T5

T6

CLK

COMMAND

READ

NOP

NOP

NOP

BURST

NOP

TERMINATE

NOP

ADDRESS

BANK,

COL n

X = 1 cycle

DQ

CAS Latency = 2

DOUT

n

DOUT

n+1

DOUT

n+2

DOUT

n+3

T0

T1

T2

T3

T4

T5

T6

T7

CLK

COMMAND

READ

NOP

NOP

NOP

BURST

NOP

TERMINATE

NOP

NOP

ADDRESS

BANK,

COL n

X = 2 cycles

DQ

CAS Latency = 3

DOUT

n

DOUT

n+1

DOUT

n+2

DOUT

n+3

NOTE: DQM is LOW.

Figure 12

Terminating a READ Burst

DON’T CARE

512Mb: x4, x8, x16 SDRAM

512MSDRAM_D.p65 – Rev. D; Pub 1/02

20

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2000, Micron Technology, Inc.

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