SPHE8200A View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

SPHE8200A

DVD Single Chip MPEG AV Processor

Unspecified 

Preliminary

SPHE8200A

RA23

ROM address bus bit 23 (R_A23) select

00: R_A23 is not available and ignored

01: R_A23 is available only at 256 pin package

l Y RA24

fidentiaOLOGC RA25

unplusNICCoTnEACNHDNINSLEYIN RA26

10: R_A23 is available at pin 133

11: reserved

ROM address bus bit 24 (R_A24) select

00: R_A24 is not available and ignored

01: R_A24 is available only at 256 pin package

10: R_A24 is available at pin 134

11: reserved

ROM address bus bit 25 (R_A25) select

00: R_A25 is not available and ignored

01: R_A25 is available only at 256 pin package

10: R_A25 is available at pin 135

11: reserved

ROM address bus bit 26 (R_A26) select

00: R_A26 is not available and ignored

01: R_A26 is available only at 256 pin package

10: R_A26 is available at pin 136

11: reserved

S N CH O 0xbffe8048 sft_cfg1

U R E Description

S E S Pin MUX control register #1 (General)

Attribute: RW

For & M U Bit-field

15 14

LPT

13

BOOT

12 11 10

pcmcia_WAIT

9

8

7

pcmcia_IORW

6

5

CHRDY WE

4

3

2

1

OE CS4 CS3 CS2

0

CS1

Reset

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

CS1

CS1 (ROM/FLASH chip select 1) function control

1: Enable Chip Select 1 (default)

0: Disable (CS1 becomes GPIO)

CS2

CS2 (ROM/FLASH chip select 2) function control

1: Enable Chip Select 2 (default)

0: Disabled (CS2 becomes GPIO)

CS3

CS3 (ROM/FLASH chip select 3) function control

1: Enable Chip Select 3 (default)

0: Disabled (CS3 becomes GPIO)

CS4

CS4 (ROM/FLASH chip select 4) function control

© Sunplus Technology Co., Ltd.

31

Proprietary & Confidential

OCT. 07, 2003

Preliminary Version: 0.2

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