SPHE8200A View Datasheet(PDF) - Unspecified
Part Name
Description
Manufacturer
SPHE8200A Datasheet PDF : 40 Pages
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Preliminary
SPHE8200A
100: Slave mode: HSYNC is from pin 34, VSYNC is from pin 35
101: Master mode: HSYNC is on pin 34, VSYNC is on pin 35
110, 111: available only at 256 pin package
TELETEXT
onfideHnNtiaOl LOINGCY pc_SYNC
TELETEXT select
00: Disable (default)
01: Teletext BIT is from pin 149, teletext REQ is from pin 150
10: Teletext BIT is from pin 37, teletext REQ is from pin 38
11: available only at 256 pin package
H/VSYNC PC select
00: Disabled (default)
01: HSYNC_PC is on pin 175, VSYNC_PC is on pin 176
10: HSYNC_PC is on pin 146, VSYNC_PC is on pin 148
11: HSYNC_PC is on pin 144, VSYNC_PC is on pin 145
s C EC ISE 0xbffe8058 sft_cfg5
Description
Pin MUX control register #5 (RISC interrupt control)
lu T D Y Attribute: RW
np IC N L 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
A N Bit-field
RISC_INTEXT
RISC_INT5_2
RISC_INT1
u N H Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FoSr S&UNMERCUSE O RISC_INT1
RID INT1 bit 15 to bit 11 interrupt select
000: Disable (default)
001: INT1[11] is from pin 141,
INT1[12] is from pin 143,
INT1[13] is from pin 144,
INT1[14] is from pin 145,
0
0
INT1[15] is from pin 146
010: INT1[11] is from pin 129,
INT1[12] is from pin 130,
INT1[13] is from pin 131,
INT1[14] is from pin 133,
INT1[15] is from pin 134
011: INT1[11] is from pin 29,
INT1[12] is from pin 31,
INT1[13] is from pin 34,
INT1[14] is from pin 35,
INT1[15] is from pin 37
© Sunplus Technology Co., Ltd.
35
Proprietary & Confidential
OCT. 07, 2003
Preliminary Version: 0.2
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