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STM8S103C2P6 View Datasheet(PDF) - STMicroelectronics

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Description
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STM8S103C2P6 Datasheet PDF : 56 Pages
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STM8S103xx, STM8S105xx
Product overview
Note:
4.14.3
LIN slave
â— Autonomous header handling - one single interrupt per valid message header
◠Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %
â— Synch delimiter checking
â— 11-bit LIN synch break detection - break detection always active
â— Parity check on the LIN identifier field
â— LIN error management
â— Hot plugging support
Asynchronous communication (UART mode)
â— Full duplex, asynchronous communications - NRZ standard format (mark/space)
â— Independently programmable transmit and receive baud rates up to 500 Kbit/s
â— Programmable data word length (8 or 9 bits)
â— Low-power standby mode - 2 receiver wake-up modes:
– Address bit (MSB)
– Idle line
â— Muting function for multiprocessor configurations
â— Overrun, noise and frame error detection
â— 6 interrupt sources
â— Tx, Rx parity control
In STM8S105, the LINUART also supports IrDA mode, Smartcard mode and synchronous
communication (SPI master mode).
SPI
â— Maximum speed: 8 Mbit/s (fMASTER/2) both for master and slave
â— Full duplex synchronous transfers
â— Simplex synchronous transfers on 2 lines with a possible bidirectional data line
â— Master or slave operation - selectable by hardware or software
â— CRC calculation
â— 1 byte Tx and Rx buffer
â— Slave/master selection input pin
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