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BC57E687C View Datasheet(PDF) - Unspecified

Part Name
Description
Manufacturer
BC57E687C Datasheet PDF : 104 Pages
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Device Details
1 Device Details
Radio
Kalimba DSP
â–  Common TX/RX terminal simplifies external
â–  Very low power Kalimba DSP coprocessor,
matching; eliminates external antenna switch
64MIPS, 24-bit fixed point core
â–  BIST minimises production test time
â–  SBC decode takes approximately 4mW power
â–  Bluetooth v2.1 + EDR specification compliant
consumption while streaming music
Transmitter
â–  Single-cycle MAC; 24 x 24-bit multiply and 56-bit
accumulator
â–  8dBm RF transmit power with level control from on- â–  32-bit instruction word, dual 24-bit data memory
chip 6-bit DAC over a dynamic range >30dB
â–  6K x 32-bit program RAM, 16K x 24-bit + 12K x 24-
â–  Class 2 and Class 3 support without the need for an
bit data RAM
external power amplifier or TX/RX switch
â–  64-word x 32-bit program memory cache when
executing from external flash
Receiver
Stereo Audio Codec
â–  Receiver sensitivity of -90dBm
â–  Integrated channel filters
â–  16-bit internal stereo codec
â–  Digital demodulator for improved sensitivity and co- â–  Dual ADC and DAC for stereo audio
channel rejection
■ Integrated amplifiers for driving 16Ω speakers; no
â–  Real-time digitised RSSI available on HCI interface
need for external components
â–  Fast AGC for enhanced dynamic range
â–  Support for single-ended speaker termination and
line output
Synthesiser
â–  Integrated low-noise microphone bias
â–  Fully integrated synthesiser requires no external
VCO, varactor diode, resonator or loop filter
â–  Compatible with crystals 16MHz to 26MHz or an
external clock 12MHz to 52MHz
â–  ADC sample rates are 8, 11.025, 16, 22.05, 32 and
44.1kHz
â–  DAC sample rates are 8, 11.025, 12, 16, 22.05, 24,
32, 44.1 and 48kHz
â–  Accepts 14.40, 15.36, 16.2, 16.8, 19.2, 19.44,
19.68, 19.8 and 38.4MHz TCXO frequencies for
GSM and CDMA devices with sinusoidal or logic
level signals
Auxiliary Features
â–  User space on processor for customer applications
â–  Crystal oscillator with built-in digital trimming
Baseband and Software
â–  Power management includes digital shutdown and
wake-up commands with an integrated low-power
â–  32Mb external flash
oscillator for ultra-low power Park/Sniff/Hold mode
â–  48KB internal RAM, allows full-speed data transfer, â–  Clock request output to control external clock
mixed voice/data and full piconet support
â–  On-chip regulators: 1.5V output from 1.8V to 2.7V
â–  Logic for forward error correction, header error
control, access code correlation, CRC,
demodulation, encryption bit stream generation,
input and 1.8V output from 2.7V to 4.5V input
â–  On-chip high-efficiency switch-mode regulator;
1.8V output from 2.7V to 4.4V input
whitening and transmit pulse shaping
â–  Power-on-reset cell detects low supply voltage
■ Transcoders for A-law, µ-law and linear voice from ■ 10-bit ADC and 8-bit DAC available to applications
host and A-law, µ-law and CVSD voice over air
â–  On-chip charger for lithium ion/polymer batteries
Physical Interfaces
Bluetooth Stack
â–  SPI with clock speeds up to 64MHz in master mode, CSR's Bluetooth Protocol Stack runs on the on-chip
requires firmware support, and 32MHz in slave
MCU in a variety of configurations:
mode
â–  Standard HCI, UART or USB
■ I²C master compatible interface
â–  Audio codec and echo-noise suppression or
â–  UART interface with programmable data rate up to
customer-specific algorithms running on the DSP
3Mbits/s with an optional bypass mode
â–  USB v2.0 interface
Package Option
â–  Bidirectional serial programmable audio interface â–  TFBGA 169-ball, 8 x 8 x 1.2mm, 0.5mm pitch
supporting PCM, I²S and SPDIF formats
â–  2 LED drivers with faders
CS-121064-DSP4
Production Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2006 - 2010
Page 10 of 104

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