MT48LC4M32LFFC-10 View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT48LC4M32LFFC-10

SYNCHRONOUS DRAM

Micron Technology 

ADVANCE

128Mb: x16, x32

MOBILE SDRAM

EXTENDED MODE REGISTER TABLE

BA1 BA0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address Bus

M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0

13 12 11 10 9 8 7 6 5 4 3 2 1 0

1 0 All must be set to "0" TCSR PASR

Extended Mode

Register (Ex)

A4 A3 Maximum Case Temp

11

00

85˚C

70˚C

01

45˚C

10

15˚C

A2

A1

A0

0

0

0

0

0

1

0

1

0

0

1

1

1

0

0

1

0

1

1

1

0

1

1

1

Self Refresh Coverage

Four Banks

Two Banks (Bank 0,1)

One Bank (Bank 0)

RFU

RFU

RFU

RFU

RFU

Notes: 1. E13 and E12 (BA1 and BA0) must be “1, 0” to select the

Extended Mode Register (vs. the base Mode Register).

2. RFU: Reserved for Future Use

EXTENDED MODE REGISTER

The Extended Mode Register controls the functions

beyond those controlled by the Mode Register. These

additional functions are special features of the Mobile

device. They include Temperature Compensated Self Re-

fresh (TCSR) Control, and Partial Array Self Refresh

(PASR).

The Extended Mode Register is programmed via the

Mode Register Set command (BA1=1,BA0=0) and retains

the stored information until it is programmed again or

the device loses power.

The Extended Mode Register must be programmed

with M5 through M11 set to “0”. The Extended Mode

Register must be loaded when all banks are idle and no

bursts are in progress, and the controller must wait the

specified time before before initiating any subsequent

operation. Violating either of these requirements results

in unspecified operation.

TEMPERATURE COMPENSATED SELF REFRESH

Temperature Compensated Self Refresh (TCSR) al-

lows the controller to program the Refresh interval dur-

ing SELF REFRESH mode, according to the case tempera-

ture of the Mobile device. This allows great power savings

during SELF REFRESH during most operating tempera-

ture ranges. Only during extreme temperatures would

the controller have to select a TCSR level that will guaran-

tee data during SELF REFRESH.

Every cell in the DRAM requires refreshing due to the

capacitor losing its charge over time. The refresh rate is

dependent on temperature. At higher temperatures a

capacitor loses charge quicker than at lower tempera-

tures, requiring the cells to be refreshed more often.

Historically, during Self Refresh, the refresh rate has

been set to accomodate the worst case, or highest tem-

perature range expected.

128Mb: x16, x32 Mobile SDRAM

MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02

12

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2002, Micron Technology, Inc.

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