56F8355 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

56F8355

16-Bit Digital Signal Controllers

Freescale Semiconductor 

Part 2 Signal/Connection Descriptions

2.1 Introduction

The input and output signals of the 56F8355 and 56F8155 are organized into functional groups, as shown

in Table 2-1 and as illustrated in Figure 2-1. In Table 2-2, each table row describes the signal or signals

present on a pin.

Table 2-1 Functional Group Pin Allocations

Functional Group

Number of Pins in Package

56F8355

56F8155

Power (VDD or VDDA)

Power Option Control

Ground (VSS or VSSA)

Supply Capacitors1 & VPP

PLL and Clock

9

9

1

1

6

6

6

6

4

4

Bus Control

Interrupt and Program Control

6

6

4

4

Pulse Width Modulator (PWM) Ports

26

13

Serial Peripheral Interface (SPI) Port 0

Serial Peripheral Interface (SPI) Port 1

4

4

—

4

Quadrature Decoder Port 02

Quadrature Decoder Port 13

4

4

4

—

Serial Communications Interface (SCI) Ports

CAN Ports

4

4

2

—

Analog-to-Digital Converter (ADC) Ports

21

21

Timer Module Ports

JTAG/Enhanced On-Chip Emulation (EOnCE)

6

4

5

5

Temperature Sense

1

—

Dedicated GPIO ( Address Bus = 11; Data Bus = 4; Other = 134)

28

28

1. If the on-chip regulator is disabled, the VCAP pins serve as 2.5V VDD_CORE power inputs

2. Alternately, can function as Quad Timer pins or GPIO

3. Pins in this section can function as Quad Timer, SPI 1, or GPIO

4. EMI not functional in these packages; use as GPIO pins.

56F8355 Technical Data, Rev. 17

16

Freescale Semiconductor

Preliminary

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