81C55 View Datasheet(PDF) - Oki Electric Industry

Part Name

Description

Manufacturer

81C55

2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

Oki Electric Industry 

¡ Semiconductor

MSM81C55-5RS/GS/JS

(1) Programming the Command/Status (C/S) Register

The contents of the command register can be written during an I/O cycle by addressing it

with an I/O address of xxxxx000. Bit assignments for the register are shown below:

7

6

5

4

3

2

1

0

TM2 TM1 IEB IEA PC2 PC1 PB PA

Definition of PA0 - 7

Definition of PB0 - 7

Definition of PC0 - 5

0= Input

1= Output

00=ALT1

11=ALT2

01=ALT3

10=ALT4

See the port

control

assignment

table.

Port A Interrupt Enable 1 = Enabled

Port B Interrupt Enable 0 = Disabled

Timer Command

00 = NOP : Does not affect counter operations.

01 = STOP : Stops the timer if it is runnning.

NOP if the timer is not runnning.

10 = STOP AFTER TC : Stops the timer when it reaches TC.

NOP if the timer is not running.

11 = START : If the timer is not running, loads the mode and

the count length, and immediately starts timer operation.

If the timer is running, loads a new mode and the count

length, and starts timer operation immediately after

TC is reached.

Port Control Assignment Table

Pin

ALT1

ALT2

ALT3

ALT4

PC0

Input port

Output port

A INTR

A INTR

PC1

Input port

Output port

A BF

A BF

PC2

Input port

Output port

A STB

A STB

PC3

Input port

Output port

Output port

B INTR

PC4

Input port

Output port

Output port

B BF

PC5

Input port

Output port

Output port

B STB

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