88E1116R-NNC1 View Datasheet(PDF) - Marvell Semiconductor

Part Name

Description

Manufacturer

88E1116R-NNC1

Gigabit Ethernet Transceiver

Marvell Semiconductor 

Signal Description

Pin Description

Table 3: Management Interface and Interrupt

64-QFN

Pin #

48

Pin Name

MDC

Pin

Ty p e

I

45

MDIO

I/O

Description

MDC is the management data clock reference for the serial management

interface. A continuous clock stream is not expected. The maximum fre-

quency supported is 8.3 MHz.

MDIO is the management data. MDIO transfers management data in and out

of the device synchronously to MDC. This pin requires a pull-up resistor in a

range from 1.5 kohm to 10 kohm.

Table 4: LED Interface

64-QFN

Pin #

6

8

9

Pin Name

LED[0]

LED[1]

LED[2]

Pin

Ty p e

O

Description

LED/Interrupt outputs.

Table 5: JTAG Interface

64-QFN

Pin #

43

41

Pin Name

TDI

TMS

Pin

Ty p e

I

I, PU

42

TCK

I, PU

11

TRSTn

I, PU

44

TDO

O

Description

Boundary scan test data input.

Boundary scan test mode select input.

TMS contains an internal 150 kohm pull-up resistor.

Boundary scan test clock input.

TCK contains an internal 150 kohm pull-up resistor.

Boundary scan test reset input. Active low. TRSTn contains an internal 150

kohm pull-up resistor as per the 1149.1 specification. After power up, the

JTAG state machine should be reset by applying a low signal on this pin, or

by keeping TMS high and applying 5 TCK pulses, or by pulling this pin low by

a 4.7 kohm resistor.

Boundary scan test data output.

Copyright © 2011 Marvell

May 9, 2011, Advance

Document Classification: Proprietary Information

Doc. No. MV-S105539-00, Rev. --

Page 9

Share Link: