C8051F91x-C8051F90x
1.3. Serial Ports
The C8051F91x-C8051F90x Family includes an SMBus/I2C interface, a full-duplex UART with enhanced
baud rate configuration, and two Enhanced SPI interfaces. Each of the serial buses is fully implemented in
hardware and makes extensive use of the CIP-51's interrupts, thus requiring very little CPU intervention.
1.4. Programmable Counter Array
An on-chip Programmable Counter/Timer Array (PCA) is included in addition to the four 16-bit general
purpose counter/timers. The PCA consists of a dedicated 16-bit counter/timer time base with six
programmable capture/compare modules. The PCA clock is derived from one of six sources: the system
clock divided by 12, the system clock divided by 4, Timer 0 overflows, an External Clock Input (ECI), the
system clock, or the external oscillator clock source divided by 8. ‘F912 and ‘F902 devices also support a
SmaRTClock divided by 8 clock source.
Each capture/compare module can be configured to operate in a variety of modes: edge-triggered capture,
software timer, high-speed output, pulse width modulator (8, 9, 10, 11, or 16-bit), or frequency output.
Additionally, Capture/Compare Module 5 offers watchdog timer (WDT) capabilities. Following a system
reset, Module 5 is configured and enabled in WDT mode. The PCA Capture/Compare Module I/O and
External Clock Input may be routed to Port I/O via the Digital Crossbar.
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
PCA
CLOCK
MUX
16-Bit Counter/Timer
External Clock/8
SmaRTClock/8*
*Only available on ‘F912 and ‘F902 devices.
Capture/Compare
Module 0
Capture/Compare
Module 1
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4
Capture/Compare
Module 5 / WDT
Crossbar
Port I/O
Figure 1.6. PCA Block Diagram
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Rev. 1.0