C8051F912 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
C8051F912 Datasheet PDF : 318 Pages
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C8051F91x-C8051F90x
Table 3.1. Pin Definitions for the C8051F91x-C8051F90x (Continued)
Name
P0.6
Pin Numbers
‘F912-GM ‘F912-GU
‘F902-GM ‘F902-GU
‘F911-GM ‘F911-GU
‘F901-GM ‘F901-GU
Type
Description
18
21 D I/O or Port 0.6. See Section “21. Port Input/Output” on page 205 for a
A In complete description.
CNVSTR
P0.7
17
IREF0
P1.0
16
D In External Convert Start Input for ADC0. See Section “5.7. ADC0
Analog Multiplexer” on page 78 for a complete description.
20 D I/O or Port 0.7. See Section “21. Port Input/Output” on page 205 for a
A In complete description.
A Out
IREF0 Output. See IREF Section for complete description.
19 D I/O or Port 1.0. See Section “21. Port Input/Output” on page 205 for a
A In complete description. May also be used as SCK for SPI1.
P1.1
P1.2
P1.3
P1.4
15
18 D I/O or Port 1.1. See Section “21. Port Input/Output” on page 205 for a
A In complete description.
May also be used as MISO for SPI1.
14
17 D I/O or Port 1.2. See Section “21. Port Input/Output” on page 205 for a
A In complete description.
May also be used as MOSI for SPI1.
13
16 D I/O or Port 1.3. See Section “21. Port Input/Output” on page 205 for a
A In complete description.
May also be used as NSS for SPI1.
12
15 D I/O or Port 1.4. See Section “21. Port Input/Output” on page 205 for a
A In complete description.
P1.5
11
14 D I/O or Port 1.5. See Section “21. Port Input/Output” on page 205 for a
A In complete description.
P1.6
10
13 D I/O or Port 1.6. See Section “21. Port Input/Output” on page 205 for a
A In complete description.
*Note: Available only on the C8051F912/02.
Rev. 1.0
29
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