DSP56011 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

DSP56011

24-BIT DVD DIGITAL SIGNAL PROCESSOR

Motorola => Freescale 

Specifications

Host Interface (HI) Timing

Table 2-8 Host I/O Timing (All Frequencies) (Continued)

Num

Characteristics

Min

Max

Unit

PRELIMINARY 47

Delay from HEN deassertion to HOREQ assertion for

RXL read4,5

TL + TC + TH

—

ns

48 Delay from HEN deassertion to HOREQ assertion for

TXL write4,5

TL + TC

—

ns

49 Delay from HEN assertion to HOREQ deassertion for

RXL read, TXL write4,5

3

58

ns

Notes: 1. See Host Port Considerations in Section 4 Design Considerations.

2. This timing is applicable only if a write to the TXL is followed by writing the TXL, TXM, or TXH

registers without first polling the TXDE or HOREQ flags, or waiting for HOREQ to be asserted.

3. This timing is applicable only if a read from the RXL is followed by reading the RXL, RXM or RXH

registers without first polling the RXDF or HOREQ flags, or waiting for HOREQ to be asserted.

4. HOREQ is pulled up by a 1 kΩ resistor.

5. Specifications are periodically sampled and not 100% tested.

6. May decrease to 0 ns for future versions

HOREQ

(Output)

HACK

(Input)

HR/W

(Input)

H0–H7

(Output)

31

32

41

42

36

35

37

38

Data Valid

Figure 2-8 Host Interrupt Vector Register (IVR) Read

AA1275

2-10

Preliminary Information

DSP56011 Technical Data Sheet, Rev. 1

MOTOROLA

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