DSP56011 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

DSP56011

24-BIT DVD DIGITAL SIGNAL PROCESSOR

Motorola => Freescale 

FEATURES

DSP56011

Features

P R E L I M I N A R Y Digital Signal Processing Core

• Efficient, object-code compatible, 24-bit DSP56000 family DSP engine

– 47.5 Million Instructions Per Second (MIPS) with 21.05 ns instruction cycle at 95 MHz

– Highly parallel instruction set with unique DSP addressing modes

– Two 56-bit accumulators including extension byte

– Parallel 24 × 24-bit multiply-accumulate in 1 instruction cycle (2 clock cycles)

– Double precision 48 × 48-bit multiply with 96-bit result in 6 instruction cycles

– 56-bit addition/subtraction in 1 instruction cycle

– Fractional and integer arithmetic with support for multi-precision arithmetic

– Hardware support for block-floating point Fast Fourier Transforms (FFT)

– Hardware nested DO loops

– Zero-overhead fast interrupts (2 instruction cycles)

– PLL-based clocking with a wide range of frequency multiplications (1 to 4096) and

power saving clock divider (2i : i = 0 to 15), which reduces clock noise

– Four 24-bit internal data buses and three 16-bit internal address buses for

simultaneous accesses to one program and two data memories

Preliminary Information

MOTOROLA

DSP56011 Technical Data Sheet, Rev. 1

iii

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