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DSP56011 View Datasheet(PDF) - Motorola => Freescale

Part Name
Description
Manufacturer
DSP56011
Motorola
Motorola => Freescale Motorola
DSP56011 Datasheet PDF : 82 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
DSP56011
Features
Memory
• Modified Harvard architecture allows simultaneous access to program and data
memories
PRELIMINARY • 12800×24-biton-chipProgramROM1
• 4096 × 24-bit on-chip X-data RAM and 3584 × 24-bit on-chip X-data ROM1
• 4352 × 24-bit on-chip Y-data RAM and 2048 × 24-bit on-chip Y-data ROM1
• 512 × 24-bit on-chip Program RAM and 64 × 24-bit bootstrap ROM
• As much as 2304 × 24 bits of X- and Y-data RAM can be switched to Program RAM,
giving a total of 2816 × 24 bits of Program RAM
Table 1 lists the memory configurations of the DSP56011.
Table 1 DSP56011 Internal Memory Configurations
Memory Type
No Switch
(PEA = 0, PEB = 0)
Switch A
(PEA = 1, PEB = 0)
Switch B
(PEA = 0, PEB = 1)
Switch A+B
(PEA = 1, PEB = 1)
Program RAM
X data RAM
Y data RAM
Program ROM
X data ROM
Y data ROM
0.5 K
4.0 K
4.25 K
12.5 K
3.5 K
2.0 K
1.25 K
3.25 K
4.25 K
12.5 K
3.5 K
2.0 K
2.0 K
3.25 K
3.5 K
12.5 K
3.5 K
2.0 K
2.75 K
2.5 K
3.5 K
12.5 K
3.5 K
2.0 K
1.These ROMs may be factory programmed with data/program provided by the application developer.
Preliminary Information
iv
DSP56011 Technical Data Sheet, Rev. 1
MOTOROLA

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