Freescale Semiconductor, Inc.
Specifications
Phase Lock Loop (PLL) Characteristics
2.8 PHASE LOCK LOOP (PLL) CHARACTERISTICS
Table 2-6 PLL Characteristics
Characteristics
Min
Max
Unit
VCO frequency when PLL enabled
(MF × Ef × 2/PDF)
PLL external
(CPCAP1)
capacitor
(PCAP
pin
to
VCCP)
• @ MF ≤ 4
30
200
MHz
pF
(MF × 580) − 100 (MF × 780) − 140
• @ MF > 4
MF × 830
MF × 1470
Notes: 1. CPCAP is the value of the PLL capacitor (connected between the PCAP pin and VCCP). The
recommended value in pF for CPCAP can be computed from one of the following equations:
(MF x 680)-120, for MF ≤ 4, or
MF x 1100, for MF > 4.
MOTOROLA
DSP56364 Advance Information
2-7
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