DSP56362 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

DSP56362

24-Bit Audio Digital Signal Processor

Freescale Semiconductor 

Host Interface (HDI08)

Table 2-9 Host Interface (continued)

Signal Name

Type

State during Reset

Signal Description

HOREQ/HORE

HTRQ/HTRQ

PB14

Output

Output

Input, Output, or

Disconnected

GPIO Disconnected

Host Request—When HDI08 is programmed to interface a

single host request host bus and the HI function is selected, this

signal is the host request (HOREQ) output. The polarity of the

host request is programmable, but is configured as active-low

(HOREQ) following reset. The host request may be programmed

as a driven or open-drain output.

Transmit Host Request—When HDI08 is programmed to

interface a double host request host bus and the HI function is

selected, this signal is the transmit host request (HTRQ) output.

The polarity of the host request is programmable, but is

configured as active-low (HTRQ) following reset. The host

request may be programmed as a driven or open-drain output.

Port B 14—When the HDI08 is configured as GPIO, this signal

is individually programmed as input, output, or internally

disconnected.

The default state after reset for this signal is GPIO disconnected.

This input is 5 V tolerant.

HACK/HACK

HRRQ/HRRQ

PB15

Input

Output

Input, Output, or

Disconnected

GPIO Disconnected

Host Acknowledge—When HDI08 is programmed to interface

a single host request host bus and the HI function is selected,

this signal is the host acknowledge (HACK) Schmitt-trigger input.

The polarity of the host acknowledge is programmable, but is

configured as active-low (HACK) after reset.

Receive Host Request—When HDI08 is programmed to

interface a double host request host bus and the HI function is

selected, this signal is the receive host request (HRRQ) output.

The polarity of the host request is programmable, but is

configured as active-low (HRRQ) after reset. The host request

may be programmed as a driven or open-drain output.

Port B 15—When the HDI08 is configured as GPIO, this signal

is individually programmed as input, output, or internally

disconnected.

The default state after reset for this signal is GPIO disconnected.

This input is 5 V tolerant.

Freescale Semiconductor

DSP56362 Technical Data, Rev. 4

2-13

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