DSP56300FM View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

DSP56300FM

24-Bit Audio Digital Signal Processor

Freescale Semiconductor 

JTAG/OnCE Interface

2.9 JTAG/OnCE Interface

Table 2-11 JTAG/OnCE Interface

Signal

Name

Signal State During

Type

Reset

Signal Description

TCK

Input

Input

Test Clock—TCK is a test clock input signal used to synchronize the JTAG test logic.

It has an internal pull-up resistor.

This input is 5 V tolerant.

TDI

Input

Input

Test Data Input—TDI is a test data serial input signal used for test instructions and

data. TDI is sampled on the rising edge of TCK and has an internal pull-up resistor.

This input is 5 V tolerant.

TDO

Output

Tri-stated

Test Data Output—TDO is a test data serial output signal used for test instructions and

data. TDO is tri-statable and is actively driven in the shift-IR and shift-DR controller

states. TDO changes on the falling edge of TCK.

TMS

Input

Input

Test Mode Select—TMS is an input signal used to sequence the test controller’s state

machine. TMS is sampled on the rising edge of TCK and has an internal pull-up

resistor.

This input is 5 V tolerant.

Signal

Name

Signal Type

GPIO0– Input, output or

GPIO3 disconnected

Table 2-12 GPIO Signals

State During

Reset

Signal Description

Disconnected

GPIO0–3—The General Purpose I/O pins are used for control and

handshake functions between the DSP and external circuitry. Each Port B

GPIO pin may be individually programmed as an input, output or

disconnected

2-12

DSP56364 Technical Data, Rev. 4.1

Freescale Semiconductor

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