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IMX51 View Datasheet(PDF) - Freescale Semiconductor

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IMX51 Datasheet PDF : 202 Pages
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IOMUX Configuration for Boot Media
3.1 NAND
The NAND Flash Controller (NFC) signals are not configured in the IOMUX. The NFC interface uses
dedicated contacts on the IC.
3.2 SD/MMC IOMUX Pin Configuration
Table 5 shows the SD/MMC IOMUX pin configuration.
Table 5. SD/MMC IOMUX Pin Configuration
Signal
CLK
CMD
DAT0
DAT1
DAT2
CD/DAT3
DAT4
eSDHC1
SD1_CLK.alt0
SD1_CMD.alt0
SD1_DATA0.alt0
N/A1
N/A
SD1_DATA3.alt0
N/A
eSDHC2
SD2_CLK.alt0
SD2_CMD.alt0
SD2_DATA0.alt0
N/A
N/A
SD2_DATA3.alt0
N/A
eSDHC3
NANDF_RDY_INT.alt5
eSDHC4
NANDF_CS2.alt5
NANDF_CS7.alt5
NANDF_RB1.alt5
NANDF_WE_B.alt2 NANDF_CS3.alt5
N/A
N/A
N/A
N/A
NANDF_RB0.alt5
NANDF_CS6.alt5
N/A
N/A
DAT5
N/A
N/A
DAT6
N/A
N/A
DAT7
N/A
N/A
1 N/A in the ROM code indicates the pins are not available.
N/A
N/A
N/A
N/A
N/A
N/A
Only DAT0 is available when the SD/MMC is used for boot. The remaining lines (DAT1–DAT7) are not
available.
3.3 I2C IOMUX Pin Configuration
The contacts assigned to the signals used by the three I2C modules is shown in Table 6.
Table 6. I2C IOMUX Pin Configuration
Signal
HSI2C
I2C1
I2C2
SDA
SCL
I2C1_DAT.alt0
I2C1_CLK.alt0
I2C1_DAT.alt0
I2C1_CLK.alt0
GPIO1_3.alt2
GPIO1_2.alt2
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 6
Freescale Semiconductor
15

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