KS9287 View Datasheet(PDF) - Samsung

Part Name

Description

Manufacturer

KS9287

DIGITAL SIGNAL PROCESSOR

Samsung 

DIGITAL SIGNAL PROCESSOR

KS9287

EFM DEMODULATION

The EFM block is composed of the following parts: EFM demodulator to demodulate the EFM signal read from the

disc, EFM phase detector, and the control signal generator.

1) EFM Phase Detector

The EFM signal input from the Disc includes 2.1609 MHz components. To detect the phase of this signal, a Bit

Clock (/PBCK) of 4.3218 MHz is used. PBCK detects the phase of the EFM signals Edge, and sends the results to

the APD0 pin.

VCOI

PBCK

EFMI

EFMD

APDO

¨ç

¨è

¨é

(1) When theEFM signal is slower than the VCO signal

(2) When the EFM signal is locked to the VCO signal

(3) When the EFM signal is faster than the VCO signal.

Figure 4. EFM Phase Detector Timing Diagram

2) EFM Demodulation

The modulated 14 channel bit data is demodulated into 8-bit data. There are two types of demodulated data:

subcode data and audio data. Subcode data is input into the subcode handling block, and the audio data is stored

in the internal SRAM, and its errors are corrected.

3) Frame Sync Detect/Protect/Insert

• Frame Sync Detect

Data is composed of units of frame, and a frame is composed of frame sync, subcode data, audio data, and

redundancy data. This IC detects frame sync to maintain synchronization, and there are three detection methods

(refer to CNTL-E Command): (1) Pattern Detect Method

(2) Period Detect Method

(3) Compensation Detect Method: Combination of the methods above

• Frame Sync Protect/Insert

There are some cases in which frame sync is not detected, or detected it from other data which does not include

frame sync, due to disc error or jitter. In these cases, the frame sync must be protected and inserted.

To protect frame sync, a window is made by WSEL of the CNTL-S register. The frame sync entering this window is

considered valid data, and the frame sync which leaves this window is ignored. If frame sync is not detected within

the frame sync protect window, insert instead the frame sync made in the internal counter. If frame sync is inserted

continuously, reaching the number of frames set by FSEM and FSEL of the CNTL-S register, the following occurs:

ULKFS becomes H, the frame sync protect window is ignored, and the frame sync detected next is accepted

unconditionally. When a frame sync is accepted, the ULKFS signal becomes L, and accepts the frame sync

detected within the window (refer to below Table).

19

Share Link: