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LPC2109 View Datasheet(PDF) - NXP Semiconductors.

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LPC2109 Datasheet PDF : 44 Pages
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NXP Semiconductors
LPC2109/2119/2129
Single-chip 16/32-bit microcontrollers
However, the ISP flash erase command can be executed at any time (no matter whether
the CRP is on or off). Removal of CRP is achieved by erasure of full on-chip user flash.
With the CRP off, full access to the chip via the JTAG and/or ISP is restored.
6.3 On-chip static RAM
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8 bit, 16 bit, and 32 bit. The LPC2109/2119/2129 provide 8 kB of static RAM
for the LPC2109 and 16 kB for the LPC2119 and LPC2129.
6.4 Memory map
The LPC2109/2119/2129 memory maps incorporate several distinct regions, as shown in
Figure 3.
In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either
flash memory (the default) or on-chip static RAM. This is described in Section 6.18
“System control”.
LPC2109_2119_2129_6
Product data sheet
Rev. 06 — 10 December 2007
© NXP B.V. 2007. All rights reserved.
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