MT48LC16M8A2TG-7ELIT View Datasheet(PDF) - Micron Technology
Part Name
Description
Manufacturer
MT48LC16M8A2TG-7ELIT Datasheet PDF : 59 Pages
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128Mb: x4, x8, x16
SDRAM
WRITE – DQM OPERATION 1
T0
T1
T2
T3
T4
T5
T6
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
DQM /
DQML, DQMH
A0-A9, A11
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
ROW
tAS tAH
BANK
DQ
NOP
WRITE
NOP
tCMS tCMH
COLUMN m2
ENABLE AUTO PRECHARGE
DISABLE AUTO PRECHARGE
BANK
tDS tDH
DIN m
NOP
NOP
NOP
tDS tDH
DIN m + 2
tDS tDH
DIN m + 3
tRCD
T7
NOP
DON’T CARE
TIMING PARAMETERS
SYMBOL*
tAH
tAS
tCH
tCL
tCK (3)
tCK (2)
tCKH
-7E
MIN MAX
0.8
1.5
2.5
2.5
7
7.5
0.8
-75
MIN MAX
0.8
1.5
2.5
2.5
7.5
10
0.8
-8E
MIN MAX
1
2
3
3
8
10
1
UNITS
ns
ns
ns
ns
ns
ns
ns
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4.
2. x16: A9 and A11 = “Don’t Care”
x8: A11 = “Don’t Care”
SYMBOL*
tCKS
tCMH
tCMS
tDH
tDS
tRCD
-7E
MIN MAX
1.5
0.8
1.5
0.8
1.5
15
-75
MIN MAX
1.5
0.8
1.5
0.8
1.5
20
-8E
MIN MAX
2
1
2
1
2
20
UNITS
ns
ns
ns
ns
ns
ns
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65 – Rev. E; Pub. 1/02
55
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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