S25FL127S View Datasheet(PDF) - Spansion Inc.
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S25FL127S Datasheet PDF : 131 Pages
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Data Sheet (Preliminary)
2.2.2 Known Differences from Prior Generations
2.2.2.1
Error Reporting
Prior generation FL memories either do not have error status bits or do not set them if program or erase is
attempted on a protected sector. The FL-S family does have error reporting status bits for program and erase
operations. These can be set when there is an internal failure to program or erase or when there is an attempt
to program or erase a protected sector. In either case the program or erase operation did not complete as
requested by the command.
2.2.2.2
Secure Silicon Region (OTP)
The size and format (address map) of the One Time Program area is different from prior generations. The
method for protecting each portion of the OTP area is different. For additional details see Secure Silicon
Region (OTP) on page 63.
2.2.2.3
Configuration Register Freeze Bit
The configuration register Freeze bit CR1[0], locks the state of the Block Protection bits as in prior
generations. In the FL-S family it also locks the state of the configuration register TBPARM bit CR1[2],
TBPROT bit CR1[5], and the Secure Silicon Region (OTP) area.
2.2.2.4
Sector Architecture
The FL127S has sixteen 4-kbyte sectors that may be located at the top or bottom of address space. Other
members of the FL-S Family and FL-P Family have thirty two 4-kbyte sectors that may be located at the top
or bottom of address space.
These smaller parameter sectors may also be removed, leaving all sectors uniform in size, depending on the
selected configuration (SR2[7]).
2.2.2.5
Sector Erase Commands
The command for erasing an 8-kbyte area (two 4-kbyte sectors) is not supported.
The command for erasing a 4-kbyte sector is supported only for use on the 4-kbyte parameter sectors at the
top or bottom of the device address space. The 4-kbyte erase command will only erase the parameter
sectors.
The erase command for 64-kbyte sectors is supported when the configuration option for 4-kbyte parameter
sectors with 64-kbyte uniform sectors is used. The 64-kbyte erase command may be applied to erase a group
of sixteen 4-kbyte sectors.
The erase command for a 256-kbyte sector replaces the 64-kbyte erase command when the configuration
option for 256-kbyte uniform sectors is used.
2.2.2.6
Deep Power Down
The Deep Power Down (DPD) function is not supported in FL-S family devices.
The legacy DPD (B9h) command code is instead used to enable legacy SPI memory controllers, that can
issue the former DPD command, to access a new bank address register. The bank address register allows
SPI memory controllers that do not support more than 24 bits of address, the ability to provide higher order
address bits for commands, as needed to access the larger address space of the 256-Mbit and 512-Mbit
density FL-S devices. For additional information see Extended Address on page 52.
2.2.2.7
Hardware Reset
A separate hardware reset input is provided in packages with greater than 8 connections. In 8-connection
packages, a new option is provided to replace the HOLD# / IO3 input with an IO3 / RESET# input to allow for
hardware reset in small packages.
April 25, 2013 S25FL127S_00_02
S25FL127S
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