MSM82C55A-2GS View Datasheet(PDF) - Oki Electric Industry

Part Name

Description

Manufacturer

MSM82C55A-2GS

CMOS programmable peripheral interface

Oki Electric Industry 

¡ Semiconductor

MSM82C55A-2RS/GS/VJS

Precaution for Mode Selection

The output registers for ports A and C are cleared to f each time data is written in the command

register and the mode is changed, but the port B state is undefined.

Bit Set/Reset Function

When port C is defined as output port, it is possible to set (set output to 1) or reset (set output

to 0) any one of 8 bits without affecting other bits as shown below.

D7 D6 D5 D4 D3 D2 D1 D0

Definition of set/reset

for a desired bit.

0 = Reset

1 = Set

Definition of bit wanted

to be set or reset.

Dont's Care

Control word Identification flag

Be sure to set to 0 for bit set/reset

When set to 1, it becomes the control

word to define a mode and input/output.

Port C

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

D3 D2 D1

000

001

010

011

100

101

110

111

Interrupt Control Function

When the MSM82C55A-2 is used in mode 1 or mode 2, the interrupt signal for the CPU is

provided. The interrupt request signal is output from port C. When the internal flip-flop INTE

is set beforehand at this time, the desired interrupt request signal is output. When it is reset

beforehand, however, the interrupt request signal is not output. The set/reset of the internal

flip-flop is made by the bit set/reset operation for port C virtually.

Bit set Æ INTE is set Æ Interrupt allowed

Bit reset Æ INTE is reset Æ Interrupt inhibited

Operational Description by Mode

1. Mode 0 (Basic input/output operation)

Mode 0 makes the MSM82C55A-2 operate as a basic input port or output port. No control

signals such as interrupt request, etc. are required in this mode. All 24 bits can be used as

two-8-bit ports and two 4-bit ports. Sixteen combinations are then possible for inputs/

outputs. The inputs are not latched, but the outputs are.

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