UPD62A View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD62A

4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION

NEC => Renesas Technology 

µPD62A

Figure 2-4. Data Memory Configuration

R1n (high-order 4 bits) R0n (low-order 4 bits)

R0

R10

R00

R1

R11

R01

R2

R12

R02

R3

R13

R03

R4

R14

R04

R5

R15

R05

R6

R16

R06

R7

R17

R07

R8

R18

R08

R9

R19

R09

RA

R1A

R0A

RB

R1B

R0B

RC

R1C

R0C

RD

R1D

R0D

RE

R1E

R0E

RF

R1F

R0F

→DP (refer to 2.6 Data Pointer (DP))

→ASR (refer to 2.3 Address Stack Register (ASR (RF)))

2.6 Data Pointer (DP): 10 Bits

The ROM data table can be referenced by setting the ROM address in the data pointer to call the ROM contents.

The low-order 8 bits of the ROM address are specified by R0 of the data memory; and the high-order 2 bits by

bits 4 and 5 of the P3 register (CR0).

When reset, the pointer contents become “000H”.

P3 register

b5

b4

P3 DP9 DP8

Figure 2-5. Data Pointer Configuration

DP7

R10

DP6 DP5

DP4

DP3

R00

DP2 DP1

DP0 R0

2.7 Accumulator (A): 4 Bits

The accumulator, which is a register consisting of 4 bits, plays a leading role in performing various operations.

When reset, the accumulator contents become undefined.

Figure 2-6. Accumulator Configuration

A3

A2

A1

A0

A

Data Sheet U14474EJ1V0DS00

11

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