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UPD62A View Datasheet(PDF) - NEC => Renesas Technology

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UPD62A Datasheet PDF : 62 Pages
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µPD62A
4.2 Timer Operation
The timer starts (counting down) when a value other than 0 is set for the down counter with a timer operation
instruction. The timer operation instructions for making the timer start operation are shown below:
MOV T0, A
MOV T1, A
MOV T, #data10
MOV T, @R0
The down counter is decremented (–1) in the cycle of 64/fX or 128/fXNote. If the value of the down counter becomes
0, the zero-detection circuit generates the timer operation end signal to stop the timer operation. At this time, if
the timer is in HALT mode (HALT #×101B) waiting for the timer to stop its operation, the HALT mode is canceled
and the instruction following the HALT instruction is executed. The output of the timer operation end signal is
continued while the down counter is 0 and the timer is stopped. There is the following relational expression between
the timer’s time and the down counter’s set value.
Timer time = (Set value + 1) × 64/fX (or 128/fXNote)
Note This becomes 128/fX if bit 3 of the control register is set (to 1).
By setting 1 for the flag (t9) which enables the timer output, the timer can output its operation status from the
S1/LED pin and the REM pin. The REM pin can also output the carrier while the timer is in operation.
Table 4-1. Timer Output (at t9 = 1)
Timer operating
Timer halting
S1/LED Pin
L
H
REM Pin
H (or carrier outputNote)
L
Note The carrier output results if bit 2 of control register 0 is cleared (to 0).
Figure 4-2. Timer Output (When Carrier Is Not Output)
LED
Timer value: (set value + 1) × 64/fX (or 128/fX)
REM
20
Data Sheet U14474EJ1V0DS00

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