UPD77115 View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD77115 Datasheet PDF : 56 Pages
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µPD77115, 77115A
P1
P0
Boot Mode
0
0
Does not execute boot but branches to address 0x200Note.
0
1
Executes host byte boot and then branches to address 0x200.
1
0
Setting prohibited
1
1
Executes host word boot and then branches to address 0x200.
Note This setting is used when the DSP must be reset to recover from the standby mode after reset boot has
been executed once.
A boot parameter and instruction code are obtained via the host interface, and transferred to the instruction RAM.
The data transfer support byte mode and word mode.
4.2 Reboot
By calling the reboot entry address from the program, the contents of the instruction RAM can be rewritten. An
instruction code is obtained via the host interface and transferred to the instruction RAM. The data transfer support
byte mode and word mode.
The entry address is 0x6. Host reboot is executed by calling this address after setting the following parameter:
• R7L : Number of instruction steps for rebooting
• DP3: First address of instruction memory to be loaded
4.3 Signature Operation
The µPD77115 has a signature operation function so that the contents of the internal instruction RAM can be
verified. The signature operation performs a specific arithmetic operation on the data in the instruction RAM booted
up, and returns the result to a register. Perform the signature operation in advance on the device when it is operating
normally, and repeat the signature operation later to check whether the data in RAM is correct by comparing the
operation result with the previous result. If the results are identical, there is no problem.
The entry address is 0x9. Execute the operation by calling this address after setting the following parameter. The
operation result is stored in register R7.
• R7L: Number of instruction steps for operation
• DP3: First address of instruction memory for operation
Data Sheet U14867EJ5V0DS
19
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